A technique is known in which chips on or in which a semiconductor element or an integrated circuit is formed are stacked as multiple layers on a substrate to reduce the surface area of a resulting semiconductor device. In order to achieve electrical conduction between the stacked chips, a through electrode called a TSV (Through Silicon Via) may be formed.
Embedding metal into a via hole is generally performed by a plating treatment such as electroplating on an opening in a wafer to form a through electrode. In the plating treatment of the through electrode, in order to improve the electrical conductivity and durability, a plurality of metals may be stacked in the through electrode. In this case, after a layer of metal film is immersed in a plating liquid and is formed, the surface of the metal film is washed with water to remove the plating liquid, and then, an additional metal film is formed on the previously formed metal film by immersing the wafer and thus the previously formed metal film of the partially formed through electrode in the next plating liquid.
However, when the surface of the metal film is washed with water to remove the plating liquid between the plating treatments, an oxide film is formed on the surface of the metal film. Therefore, the next metal film must be formed after the oxide film is removed by some means, but it may be difficult to remove the oxide film depending on composition of the metal forming the metal film. In this case, a new metal film is formed by a plating treatment on the oxide film, but the contact performance between the oxide film and the metal film is not good, and thus a failure resulting from inadequate or incomplete plating of the next metal layer, or inadequate contact between the second and first metal layers, may occur.